{"id":94292,"date":"2021-03-14T10:12:55","date_gmt":"2021-03-14T04:12:55","guid":{"rendered":"http:\/\/rcl-radio.ru\/?p=94292"},"modified":"2022-01-08T11:48:15","modified_gmt":"2022-01-08T05:48:15","slug":"%d1%80%d0%b0%d0%b1%d0%be%d1%82%d0%b0-%d1%81-%d0%bf%d1%80%d0%b5%d1%80%d1%8b%d0%b2%d0%b0%d0%bd%d0%b8%d1%8f%d0%bc%d0%b8-pcint023","status":"publish","type":"post","link":"http:\/\/rcl-radio.ru\/?p=94292","title":{"rendered":"\u0420\u0430\u0431\u043e\u0442\u0430 \u0441 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f\u043c\u0438 PCINT0\u202623"},"content":{"rendered":"

Atmega328<\/strong><\/p>\n

\n

PCINT0\u202623 <\/strong>\u2014 \u044d\u0442\u043e \u0432\u0445\u043e\u0434\u044b \u0434\u043b\u044f \u0432\u043d\u0435\u0448\u043d\u0435\u0433\u043e \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u043a\u043e\u0442\u043e\u0440\u043e\u0435 \u0441\u0440\u0430\u0431\u0430\u0442\u044b\u0432\u0430\u0435\u0442 \u043f\u0440\u0438 \u0438\u0437\u043c\u0435\u043d\u0435\u043d\u0438\u0438 \u0441\u043e\u0441\u0442\u043e\u044f\u043d\u0438\u044f \u043d\u0430 \u0432\u0445\u043e\u0434\u0430\u0445 PCINT0..23.<\/p>\n

\"\"<\/a><\/p>\n

\u0417\u0430 \u0432\u043d\u0435\u0448\u043d\u0438\u0435 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u043e\u0442\u0432\u0435\u0447\u0430\u044e\u0442 \u043d\u0435\u0441\u043a\u043e\u043b\u044c\u043a\u043e \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u043e\u0432:<\/p>\n

 <\/p>\n

\u0420\u0435\u0433\u0438\u0441\u0442\u0440 PCICR<\/strong> — \u043e\u043f\u0440\u0435\u0434\u0435\u043b\u044f\u0435\u0442 \u043a\u0430\u043a\u0443\u044e \u0433\u0440\u0443\u043f\u043f\u0443 \u0432\u0445\u043e\u0434\u043e\u0432 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c \u0432 \u043a\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u0438\u0441\u0442\u043e\u0447\u043d\u0438\u043a\u0430 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f:<\/p>\n\n\n\n\n
7<\/strong><\/td>\n6<\/strong><\/td>\n5<\/strong><\/td>\n4<\/strong><\/td>\n3<\/strong><\/td>\n2<\/strong><\/td>\n1<\/strong><\/td>\n0<\/strong><\/td>\n<\/tr>\n
<\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\nPCIE2<\/strong><\/td>\nPCIE1<\/strong><\/td>\nPCIE0<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

\u0413\u0440\u0443\u043f\u043f\u0430 PCIE2 \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430 \u0432\u0445\u043e\u0434\u044b PCINT[23:16], PCIE1 \u0437\u0430 PCINT[14:8], \u0430 \u0433\u0440\u0443\u043f\u043f\u0430 PCIE0 \u0437\u0430 \u0432\u0445\u043e\u0434\u044b PCINT[7:0].<\/p>\n

\u041f\u0440\u0438\u043c\u0435\u0440 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u044f:<\/p>\n

PCICR |= (1 << PCIE0);<\/strong> \/\/ \u043e\u043f\u0440\u0435\u0434\u0435\u043b\u044f\u0435\u0442 \u0433\u0440\u0443\u043f\u043f\u0443 \u0432\u0445\u043e\u0434\u043e\u0432 PCIE0 PCINT0…7<\/p>\n

 <\/p>\n

\u0414\u0430\u043b\u0435\u0435 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044e\u0442\u0441\u044f \u043f\u0440\u0438 \u043d\u0435\u043e\u0431\u0445\u043e\u0434\u0438\u043c\u043e\u0441\u0442\u0438 \u0442\u0440\u0438 \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u0430, \u043a\u0430\u0436\u0434\u044b\u0439 \u0440\u0435\u0433\u0438\u0441\u0442\u0440 \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430 \u0432\u044b\u0445\u043e\u0434 PCINT\u0445 \u0432 \u0441\u0432\u043e\u0435\u0439 \u0433\u0440\u0443\u043f\u043f\u0435:<\/p>\n

    \n
  • \u0420\u0435\u0433\u0438\u0441\u0442\u0440 PCMSK2<\/strong> \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430 \u0432\u044b\u0445\u043e\u0434\u044b PCINT[23:16]<\/li>\n<\/ul>\n\n\n\n\n
    7<\/strong><\/td>\n6<\/strong><\/td>\n5<\/strong><\/td>\n4<\/strong><\/td>\n3<\/strong><\/td>\n2<\/strong><\/td>\n1<\/strong><\/td>\n0<\/strong><\/td>\n<\/tr>\n
    PCINT23<\/strong><\/td>\nPCINT22<\/strong><\/td>\nPCINT21<\/strong><\/td>\nPCINT20<\/strong><\/td>\nPCINT19<\/strong><\/td>\nPCINT18<\/strong><\/td>\nPCINT17<\/strong><\/td>\nPCINT16<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
      \n
    • \u0420\u0435\u0433\u0438\u0441\u0442\u0440 PCMSK1<\/strong> \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430 \u0432\u044b\u0445\u043e\u0434\u044b PCINT[14:8]<\/li>\n<\/ul>\n\n\n\n\n
      7<\/strong><\/td>\n6<\/strong><\/td>\n5<\/strong><\/td>\n4<\/strong><\/td>\n3<\/strong><\/td>\n2<\/strong><\/td>\n1<\/strong><\/td>\n0<\/strong><\/td>\n<\/tr>\n
      —<\/td>\nPCINT14<\/strong><\/td>\nPCINT13<\/strong><\/td>\nPCINT12<\/strong><\/td>\nPCINT11<\/strong><\/td>\nPCINT10<\/strong><\/td>\nPCINT9<\/strong><\/td>\nPCINT8<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
        \n
      • \u0420\u0435\u0433\u0438\u0441\u0442\u0440 PCMSK0<\/strong> \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430 \u0432\u044b\u0445\u043e\u0434\u044b PCINT[7:0]<\/li>\n<\/ul>\n\n\n\n\n
        7<\/strong><\/td>\n6<\/strong><\/td>\n5<\/strong><\/td>\n4<\/strong><\/td>\n3<\/strong><\/td>\n2<\/strong><\/td>\n1<\/strong><\/td>\n0<\/strong><\/td>\n<\/tr>\n
        PCINT7<\/strong><\/td>\nPCINT6<\/strong><\/td>\nPCINT5<\/strong><\/td>\nPCINT4<\/strong><\/td>\nPCINT3<\/strong><\/td>\nPCINT2<\/strong><\/td>\nPCINT1<\/strong><\/td>\nPCINT0<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

        \u0423\u0441\u0442\u0430\u043d\u043e\u0432\u043a\u0430 \u043a\u0430\u043a\u043e\u0433\u043e-\u043d\u0438\u0431\u0443\u0434\u044c \u0431\u0438\u0442\u0430 \u0438\u0437 PCINT0\u202623 \u0440\u0430\u0437\u0440\u0435\u0448\u0430\u0435\u0442 \u0441\u043e\u043e\u0442\u0432\u0435\u0442\u0441\u0442\u0432\u0443\u044e\u0449\u0435\u043c\u0443 \u0432\u044b\u0432\u043e\u0434\u0443 \u0440\u0430\u0431\u043e\u0442\u0430\u0442\u044c \u0432 \u043a\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u0438\u0441\u0442\u043e\u0447\u043d\u0438\u043a\u0430.<\/p>\n

        \u041e\u0434\u043d\u043e\u0432\u0440\u0435\u043c\u0435\u043d\u043d\u043e \u043c\u043e\u0436\u043d\u043e \u0437\u0430\u0434\u0435\u0439\u0441\u0442\u0432\u043e\u0432\u0430\u0442\u044c \u043d\u0435\u0441\u043a\u043e\u043b\u044c\u043a\u043e \u0432\u0445\u043e\u0434\u043e\u0432, \u043a\u043e\u0442\u043e\u0440\u044b\u0435 \u0431\u0443\u0434\u0443\u0442 \u0440\u0430\u0431\u043e\u0442\u0430\u0442\u044c \u043a\u0430\u043a \u0438\u0441\u0442\u043e\u0447\u043d\u0438\u043a \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f.<\/p>\n

        \u041f\u0440\u0438\u043c\u0435\u0440 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u044f:<\/p>\n

        PCMSK0 |= (1 << PCINT0);<\/strong> \/\/ \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c PCINT0 \u0432 \u0433\u0440\u0443\u043f\u043f\u0435 PCIE0<\/p>\n

         <\/p>\n

        PCIFR<\/strong> — \u0440\u0435\u0433\u0438\u0441\u0442\u0440 \u0444\u043b\u0430\u0433\u043e\u0432<\/p>\n\n\n\n\n
        7<\/strong><\/td>\n6<\/strong><\/td>\n5<\/strong><\/td>\n4<\/strong><\/td>\n3<\/strong><\/td>\n2<\/strong><\/td>\n1<\/strong><\/td>\n0<\/strong><\/td>\n<\/tr>\n
        <\/td>\n<\/td>\n<\/td>\n<\/td>\n<\/td>\nPCIF2<\/strong><\/td>\nPCIF1<\/strong><\/td>\nPCIF0<\/strong><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

        \u041f\u0440\u0438 \u0441\u043c\u0435\u043d\u0435 \u043b\u043e\u0433\u0438\u0447\u0435\u0441\u043a\u043e\u0433\u043e \u0443\u0440\u043e\u0432\u043d\u044f \u043d\u0430 \u043b\u044e\u0431\u043e\u043c \u0438\u0437 \u0432\u044b\u0432\u043e\u0434\u043e\u0432 PCINT0\u202623 \u043f\u0440\u043e\u0438\u0441\u0445\u043e\u0434\u0438\u0442 \u0432\u044b\u0437\u043e\u0432 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f, \u043f\u0440\u0438 \u044d\u0442\u043e\u043c \u0443\u0441\u0442\u0430\u043d\u0430\u0432\u043b\u0438\u0432\u0430\u0435\u0442\u0441\u044f \u0441\u043e\u043e\u0442\u0432\u0435\u0442\u0441\u0442\u0432\u0443\u044e\u0449\u0438\u0439 \u0444\u043b\u0430\u0433 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f PCIF0…3 (\u043d\u0430 \u043e\u0434\u043d\u0443 \u0433\u0440\u0443\u043f\u043f\u0443 \u043e\u0434\u0438\u043d \u0444\u043b\u0430\u0433). \u042d\u0442\u043e\u0442 \u0444\u043b\u0430\u0433 \u043e\u0447\u0438\u0449\u0430\u0435\u0442\u0441\u044f \u0430\u043f\u043f\u0430\u0440\u0430\u0442\u043d\u043e \u043f\u043e\u0441\u043b\u0435 \u0432\u044b\u0445\u043e\u0434\u0430 \u0438\u0437 \u043f\u043e\u0434\u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u044b \u043e\u0431\u0440\u0430\u0431\u043e\u0442\u043a\u0438 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f.<\/p>\n

        <\/div>\n

        \u041e\u0431\u0440\u0430\u0431\u043e\u0442\u0447\u0438\u043a\u0438 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f\u00a0PCINTx_vect<\/strong>, \u043a\u0430\u0436\u0434\u044b\u0439 \u0434\u043b\u044f \u0441\u0432\u043e\u0435\u0439 \u0433\u0440\u0443\u043f\u043f\u044b.<\/p>\n

        \u041f\u0440\u0438\u043c\u0435\u0440 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u043d\u0438\u044f:<\/p>\n

        ISR(PCINT0_vect<\/b>){ \/\/ \u2014 \u043a\u043e\u0434 \u2014 \/\/} <\/strong>\u2014 \u043f\u0440\u0438 \u0432\u043e\u0437\u043d\u0438\u043a\u043d\u043e\u0432\u0435\u043d\u0438\u0438 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u0438\u0441\u043f\u043e\u043b\u043d\u044f\u0435\u0442\u0441\u044f \/\/ \u2014 \u043a\u043e\u0434 \u2014 \/\/<\/p>\n

        ISR(PCINT1_vect<\/b>){ \/\/ \u2014 \u043a\u043e\u0434 \u2014 \/\/} <\/strong>\u2014 \u043f\u0440\u0438 \u0432\u043e\u0437\u043d\u0438\u043a\u043d\u043e\u0432\u0435\u043d\u0438\u0438 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u0438\u0441\u043f\u043e\u043b\u043d\u044f\u0435\u0442\u0441\u044f \/\/ \u2014 \u043a\u043e\u0434 \u2014 \/\/<\/p>\n

        ISR(PCINT2_vect<\/b>){ \/\/ \u2014 \u043a\u043e\u0434 \u2014 \/\/} <\/strong>\u2014 \u043f\u0440\u0438 \u0432\u043e\u0437\u043d\u0438\u043a\u043d\u043e\u0432\u0435\u043d\u0438\u0438 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u0438\u0441\u043f\u043e\u043b\u043d\u044f\u0435\u0442\u0441\u044f \/\/ \u2014 \u043a\u043e\u0434 \u2014 \/\/<\/p>\n

         <\/p>\n

        \u041f\u0440\u0438\u043c\u0435\u0440:<\/p>\n

        int<\/span> i<\/span>;<\/span>\r\n\r\nvoid<\/span> setup<\/span>(<\/span>)<\/span> {<\/span>\r\n \u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> PB5<\/span>)<\/span>;<\/span>\/\/ \u0432\u044b\u0445\u043e\u0434 \u0441\u0432\u0435\u0442\u043e\u0434\u0438\u043e\u0434\u0430 D13 (PB5) \u043d\u0430 \u043f\u043b\u0430\u0442\u0435 Arduino<\/span>\r\n \u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> 0<\/span>)<\/span>;<\/span> PORTB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> 0<\/span>)<\/span>;<\/span> \/\/ \u0432\u044b\u0445\u043e\u0434 PCINT0 (D8) \u043a\u0430\u043a \u0432\u044b\u0445\u043e\u0434, \u043f\u043e\u0434\u0442\u044f\u0433\u0438\u0432\u0430\u044e\u0449\u0438\u0439 \u0440\u0435\u0437\u0438\u0441\u0442\u043e\u0440 \u0432\u043a\u043b\u044e\u0447\u0438\u0442\u044c<\/span>\r\n \u00a0PCICR<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> PCIE0<\/span>)<\/span>;<\/span> \/\/ \u043e\u043f\u0440\u0435\u0434\u0435\u043b\u044f\u0435\u0442 \u0433\u0440\u0443\u043f\u043f\u0443 \u0432\u0445\u043e\u0434\u043e\u0432 PCIE0 PCINT0...7<\/span>\r\n \u00a0PCMSK0<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> PCINT0<\/span>)<\/span>;<\/span> \/\/ \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c PCINT0 \u0432 \u0433\u0440\u0443\u043f\u043f\u0435 PCIE0<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> loop<\/span>(<\/span>)<\/span> {<\/span>\r\n \u00a0PORTB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> 5<\/span>)<\/span>;<\/span> \/\/ PB5 \u0432\u044b\u0445\u043e\u0434 1<\/span>\r\n \u00a0if<\/span> (<\/span>i<\/span> ==<\/span> 1<\/span>)<\/span>delay<\/span>(<\/span>5000<\/span>)<\/span>;<\/span> i<\/span> =<\/span> 0<\/span>;<\/span> \/\/ \u043a\u0430\u043a \u0441\u0440\u0430\u0431\u043e\u0442\u0430\u0435\u0442 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u0435 \u043f\u043e\u0434\u043e\u0436\u0434\u0430\u0442\u044c 5 \u0441\u0435\u043a\u0443\u043d\u0434<\/span>\r\n}<\/span>\r\n\r\nISR<\/span>(<\/span>PCINT0_vect<\/span>)<\/span> {<\/span>\r\n \u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> 5<\/span>)<\/span>;<\/span> \/\/ \u043f\u043e\u0433\u0430\u0441\u0438\u0442\u044c \u0441\u0432\u0435\u0442\u043e\u0434\u0438\u043e\u0434 \u043d\u0430 D13<\/span>\r\n \u00a0i<\/span> =<\/span> 1<\/span>;<\/span>\r\n}<\/span>\r\n<\/pre>\n
        \u0421\u0432\u0435\u0442\u043e\u0434\u0438\u043e\u0434 \u043d\u0430 \u043f\u043b\u0430\u0442\u0435 Arduino Uno \u043a\u043e\u0442\u043e\u0440\u044b\u0439 \u043f\u043e\u0434\u043a\u043b\u044e\u0447\u0435\u043d \u043a PB5 \u0433\u043e\u0440\u0438\u0442 \u0432\u0441\u0435\u0433\u0434\u0430, \u0435\u0441\u043b\u0438 \u043a\u0440\u0430\u0442\u043a\u043e\u0432\u0440\u0435\u043c\u0435\u043d\u043d\u043e \u0437\u0430\u043c\u043a\u043d\u0443\u0442\u044c \u0432\u0445\u043e\u0434 PCINT0 \u043d\u0430 GND, \u0441\u0432\u0435\u0442\u043e\u0434\u0438\u043e\u0434 \u043f\u043e\u0433\u0430\u0441\u043d\u0435\u0442 \u043d\u0430 5 \u0441\u0435\u043a\u0443\u043d\u0434 \u0438 \u0437\u0430\u0433\u043e\u0440\u0438\u0442\u0441\u044f \u0432\u043d\u043e\u0432\u044c.<\/p>\n","protected":false},"excerpt":{"rendered":"
        Atmega328 PCINT0\u202623 \u2014 \u044d\u0442\u043e \u0432\u0445\u043e\u0434\u044b \u0434\u043b\u044f \u0432\u043d\u0435\u0448\u043d\u0435\u0433\u043e \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u043a\u043e\u0442\u043e\u0440\u043e\u0435 \u0441\u0440\u0430\u0431\u0430\u0442\u044b\u0432\u0430\u0435\u0442 \u043f\u0440\u0438 \u0438\u0437\u043c\u0435\u043d\u0435\u043d\u0438\u0438 \u0441\u043e\u0441\u0442\u043e\u044f\u043d\u0438\u044f \u043d\u0430 \u0432\u0445\u043e\u0434\u0430\u0445 PCINT0..23. \u0417\u0430 \u0432\u043d\u0435\u0448\u043d\u0438\u0435 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f \u043e\u0442\u0432\u0435\u0447\u0430\u044e\u0442 \u043d\u0435\u0441\u043a\u043e\u043b\u044c\u043a\u043e \u0440\u0435\u0433\u0438\u0441\u0442\u0440\u043e\u0432:   \u0420\u0435\u0433\u0438\u0441\u0442\u0440 PCICR — \u043e\u043f\u0440\u0435\u0434\u0435\u043b\u044f\u0435\u0442 \u043a\u0430\u043a\u0443\u044e \u0433\u0440\u0443\u043f\u043f\u0443 \u0432\u0445\u043e\u0434\u043e\u0432 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c \u0432 \u043a\u0430\u0447\u0435\u0441\u0442\u0432\u0435 \u0438\u0441\u0442\u043e\u0447\u043d\u0438\u043a\u0430 \u043f\u0440\u0435\u0440\u044b\u0432\u0430\u043d\u0438\u044f: 7 6 5 4 3 2 1 0 PCIE2 PCIE1 PCIE0 \u0413\u0440\u0443\u043f\u043f\u0430 PCIE2 \u043e\u0442\u0432\u0435\u0447\u0430\u0435\u0442 \u0437\u0430 \u0432\u0445\u043e\u0434\u044b PCINT[23:16], PCIE1 \u0437\u0430 PCINT[14:8], […]<\/p>\n","protected":false},"author":1,"featured_media":94262,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[239,285],"tags":[],"class_list":["post-94292","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-arduino","category-atmega328-arduino-ide"],"views":7701,"_links":{"self":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts\/94292","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=94292"}],"version-history":[{"count":4,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts\/94292\/revisions"}],"predecessor-version":[{"id":111148,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts\/94292\/revisions\/111148"}],"wp:featuredmedia":[{"embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/media\/94262"}],"wp:attachment":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=94292"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=94292"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=94292"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}