{"id":132443,"date":"2024-08-15T23:07:23","date_gmt":"2024-08-15T17:07:23","guid":{"rendered":"http:\/\/rcl-radio.ru\/?p=132443"},"modified":"2025-05-08T18:18:07","modified_gmt":"2025-05-08T12:18:07","slug":"attiny13-4-%d1%85-%d1%80%d0%b0%d0%b7%d1%80%d1%8f%d0%b4%d0%bd%d1%8b%d0%b9-7-%d1%81%d0%b5%d0%b3%d0%bc%d0%b5%d0%bd%d1%82%d0%bd%d1%8b%d0%b9-%d0%b8%d0%bd%d0%b4%d0%b8%d0%ba%d0%b0%d1%82%d0%be%d1%80-%d0%bd","status":"publish","type":"post","link":"http:\/\/rcl-radio.ru\/?p=132443","title":{"rendered":"ATtiny13 + 4-\u0445 \u0440\u0430\u0437\u0440\u044f\u0434\u043d\u044b\u0439 7-\u0441\u0435\u0433\u043c\u0435\u043d\u0442\u043d\u044b\u0439 \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440 \u043d\u0430 MAX7219 0,56′"},"content":{"rendered":"

\u041c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440 ATtiny13 \u043e\u0442\u043b\u0438\u0447\u043d\u043e \u043f\u043e\u0434\u0445\u043e\u0434\u0438\u0442 \u0434\u043b\u044f \u043c\u0430\u043b\u0435\u043d\u044c\u043a\u0438\u0445 \u0438 \u0434\u0435\u0448\u0435\u0432\u044b\u0445 \u043f\u0440\u043e\u0435\u043a\u0442\u043e\u0432, \u0430 \u043f\u043e\u0434\u0434\u0435\u0440\u0436\u043a\u0430 \u0441\u0440\u0435\u0434\u043e\u0439 \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u044f Arduino IDE \u0437\u0430\u043c\u0435\u0442\u043d\u043e \u0443\u043f\u0440\u043e\u0449\u0430\u0435\u0442 \u0440\u0430\u0431\u043e\u0442\u0443 \u0441 \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u043e\u043c.<\/p>\n

\u041a\u0430\u043a \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c ATtiny13 \u0432 \u0441\u0440\u0435\u0434\u0435 Arduino \u043f\u043e\u0434\u0440\u043e\u0431\u043d\u043e \u043e\u043f\u0438\u0441\u0430\u043d\u043e \u0432 http:\/\/rcl-radio.ru\/?p=98729<\/a>.<\/p>\n

<\/p>\n

\u0412 \u044d\u0442\u043e\u0439 \u0441\u0442\u0430\u0442\u044c\u0435 \u043f\u043e\u043a\u0430\u0437\u0430\u043d\u044b \u043d\u0435\u0441\u043a\u043e\u043b\u044c\u043a\u043e \u043f\u0440\u043e\u0441\u0442\u044b\u0445 \u043f\u0440\u0438\u043c\u0435\u0440\u043e\u0432 \u0440\u0430\u0431\u043e\u0442\u044b \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430 ATtiny13 \u0441\u043e\u0432\u043c\u0435\u0441\u0442\u043d\u043e \u0441 4-\u0445 \u0440\u0430\u0437\u0440\u044f\u0434\u043d\u044b\u043c 7-\u0441\u0435\u0433\u043c\u0435\u043d\u0442\u043d\u044b\u043c \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u043e\u043c (BTE<\/b>21<\/b>—30<\/b>) \u043d\u0430 MAX7219 0,56′.<\/p>\n

\"\"<\/a><\/p>\n

MAX7219 \u2013 \u0434\u0440\u0430\u0439\u0432\u0435\u0440 \u0432\u043e\u0441\u044c\u043c\u0438 \u0440\u0430\u0437\u0440\u044f\u0434\u043d\u043e\u0433\u043e \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u0430 \u0441 \u043f\u043e\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u0442\u0435\u043b\u044c\u043d\u044b\u043c \u0438\u043d\u0442\u0435\u0440\u0444\u0435\u0439\u0441\u043e\u043c. \u0414\u0440\u0430\u0439\u0432\u0435\u0440 \u043c\u043e\u0436\u0435\u0442 \u0443\u043f\u0440\u0430\u0432\u043b\u044f\u0442\u044c \u0432\u043e\u0441\u0435\u043c\u044c\u044e \u0441\u0435\u043c\u0438\u0441\u0435\u0433\u043c\u0435\u043d\u0442\u043d\u044b\u043c\u0438 \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u0430\u043c\u0438 \u0441 \u0442\u043e\u0447\u043a\u043e\u0439, \u043b\u0438\u0431\u043e \u043e\u0442\u0434\u0435\u043b\u044c\u043d\u043e 64 \u0441\u0432\u0435\u0442\u043e\u0434\u0438\u043e\u0434\u0430\u043c\u0438 \u0432 LED \u043f\u0430\u043d\u0435\u043b\u044f\u0445 \u0441 \u043e\u0431\u0449\u0438\u043c \u043a\u0430\u0442\u043e\u0434\u043e\u043c.<\/p>\n

<\/div>\n

\u0414\u0440\u0430\u0439\u0432\u0435\u0440 MAX7219 \u0443\u043f\u0440\u0430\u0432\u043b\u044f\u0435\u0442\u0441\u044f \u043f\u043e \u0442\u0440\u0435\u0445\u043f\u0440\u043e\u0432\u043e\u0434\u043d\u043e\u0439 \u043f\u043e\u0441\u043b\u0435\u0434\u043e\u0432\u0430\u0442\u0435\u043b\u044c\u043d\u043e\u0439 \u0448\u0438\u043d\u0435 Microwire (3-Wire). \u041a\u0430\u0436\u0434\u044b\u0439 \u0438\u0437 \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u0430 \u0438\u043c\u0435\u0435\u0442 \u043d\u0435\u0437\u0430\u0432\u0438\u0441\u0438\u043c\u0443\u044e \u0430\u0434\u0440\u0435\u0441\u0430\u0446\u0438\u044e \u0438 \u0435\u0433\u043e \u0441\u043e\u0434\u0435\u0440\u0436\u0438\u043c\u043e\u0435 \u043c\u043e\u0436\u0435\u0442 \u0431\u044b\u0442\u044c \u043e\u0431\u043d\u043e\u0432\u043b\u0435\u043d \u0431\u0435\u0437 \u043d\u0435\u043e\u0431\u0445\u043e\u0434\u0438\u043c\u043e\u0441\u0442\u0438 \u043f\u0435\u0440\u0435\u0437\u0430\u043f\u0438\u0441\u0438 \u0432\u0441\u0435\u0433\u043e \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u0430.<\/p>\n

\u0411\u043e\u043b\u0435\u0435 \u043f\u043e\u0434\u0440\u043e\u0431\u043d\u043e \u043e \u0440\u0430\u0431\u043e\u0442\u0435 \u0434\u0440\u0430\u0439\u0432\u0435\u0440\u0430 \u043c\u043e\u0436\u043d\u043e \u0443\u0437\u043d\u0430\u0442\u044c \u0438\u0437 — http:\/\/rcl-radio.ru\/?p=98749<\/a>.<\/p>\n

\"\"<\/a><\/p>\n

\"\"<\/a><\/p>\n

\u0422\u0435\u0441\u0442\u043e\u0432\u044b\u0439 \u0441\u043a\u0435\u0442\u0447<\/strong><\/p>\n

\"\"<\/a><\/p>\n

\u0422\u0435\u0441\u0442\u043e\u0432\u044b\u0439 \u0441\u043a\u0435\u0442\u0447 \u043f\u0440\u043e\u0441\u0442\u043e \u0434\u0435\u043c\u043e\u043d\u0441\u0442\u0440\u0438\u0440\u0443\u0435\u0442 \u0440\u0430\u0431\u043e\u0442\u0443 \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u0430 (\u043e\u0442\u0441\u0447\u0435\u0442 \u0441\u0435\u043a\u0443\u043d\u0434).<\/p>\n

\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> PB0<\/span>\r\n#define<\/span> CLK<\/span> PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0PB2<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\r\n\r\nint<\/span> ccc<\/span>;<\/span>\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0ccc<\/span>++<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> ccc<\/span>\/<\/span>1000<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> ccc<\/span>\/<\/span>100<\/span>%<\/span>10<\/span> +<\/span> 0xF0<\/span>)<\/span>;<\/span>\/\/ \u0437\u0430\u043f\u044f\u0442\u0430\u044f<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> ccc<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> ccc<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>1000<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\n<\/pre>\n
<\/div>\n
\u0422\u0435\u0440\u043c\u043e\u043c\u0435\u0442\u0440 DS18B20<\/strong><\/p>\n
\u0418\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u044f \u0446\u0438\u0444\u0440\u043e\u0432\u043e\u0439 \u0434\u0430\u0442\u0447\u0438\u043a DS18B20 \u043c\u043e\u0436\u043d\u043e \u0441\u043e\u0431\u0440\u0430\u0442\u044c \u043f\u0440\u043e\u0441\u0442\u043e\u0439 \u0442\u0435\u0440\u043c\u043e\u043c\u0435\u0442\u0440<\/p>\n
\"\"<\/a><\/p>\n
\"\"<\/a><\/p>\n
\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> \u00a0PB0<\/span>\r\n#define<\/span> CLK<\/span> \u00a0PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0\u00a0PB2<\/span> \u00a0\r\n#define<\/span> TEMP<\/span> PB4<\/span> \u00a0\u00a0\u00a0\r\n\r\nint<\/span> ccc<\/span>;<\/span>\r\nbool<\/span> minus<\/span>;<\/span>\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0int<\/span> temp<\/span> =<\/span> read_temp<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0if<\/span>(<\/span>temp<\/span><<\/span>0<\/span>)<\/span>{<\/span>minus<\/span>=<\/span>1<\/span>;<\/span>temp<\/span>=<\/span>-<\/span>temp<\/span>;<\/span>}<\/span>else<\/span>{<\/span>minus<\/span>=<\/span>0<\/span>;<\/span>}<\/span>\r\n \u00a0if<\/span>(<\/span>minus<\/span>==<\/span>0<\/span>)<\/span>{<\/span>WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 15<\/span>)<\/span>;<\/span>}<\/span>else<\/span>{<\/span>WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> temp<\/span>\/<\/span>100<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> temp<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>+<\/span>0xf0<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> temp<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>3000<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\n\/\/\/\/ DS18B20 \/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/<\/span>\r\nuint8_t<\/span> therm_reset<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> i<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>480<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>60<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0i<\/span>=<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> TEMP<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>420<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> i<\/span>;<\/span>\r\n}<\/span>\r\nvoid<\/span> therm_write_bit<\/span>(<\/span>uint8_t<\/span> bit<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>bit<\/span>)<\/span> DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>60<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n}<\/span>\r\nuint8_t<\/span> therm_read_bit<\/span>(<\/span>void<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> bit<\/span>=<\/span>0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>14<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>PINB<\/span> &<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>)<\/span> bit<\/span>=<\/span>1<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>45<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> bit<\/span>;<\/span>\r\n}<\/span>\r\nuint8_t<\/span> therm_read_byte<\/span>(<\/span>void<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> i<\/span>=<\/span>8<\/span>,<\/span> n<\/span>=<\/span>0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>i<\/span>--<\/span>)<\/span>{<\/span>n<\/span>>>=<\/span>1<\/span>;<\/span>n<\/span>|=<\/span>(<\/span>therm_read_bit<\/span>(<\/span>)<\/span><<<\/span>7<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> n<\/span>;<\/span>\r\n}<\/span>\r\nvoid<\/span> therm_write_byte<\/span>(<\/span>uint8_t<\/span> byte<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> i<\/span>=<\/span>8<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>i<\/span>--<\/span>)<\/span>{<\/span>therm_write_bit<\/span>(<\/span>byte<\/span>&<\/span>1<\/span>)<\/span>;<\/span>byte<\/span> >>=<\/span> 1<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0}<\/span>}<\/span>\r\nint<\/span> read_temp<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> temperature<\/span>[<\/span>2<\/span>]<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0int<\/span> temper<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_reset<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0xCC<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0x44<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>!<\/span>therm_read_bit<\/span>(<\/span>)<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_reset<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0xCC<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0xBE<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0temperature<\/span>[<\/span>0<\/span>]<\/span>=<\/span>therm_read_byte<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0temperature<\/span>[<\/span>1<\/span>]<\/span>=<\/span>therm_read_byte<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_reset<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> temper<\/span> =<\/span> (<\/span>temperature<\/span>[<\/span>1<\/span>]<\/span> <<<\/span> 8<\/span> |<\/span> temperature<\/span>[<\/span>0<\/span>]<\/span>)<\/span>*<\/span>10<\/span>\/<\/span>16<\/span>;<\/span>\r\n}<\/span> \u00a0\r\n<\/pre>\n
\u041f\u0440\u043e\u0441\u0442\u044b\u0435 \u0447\u0430\u0441\u044b \u043d\u0430 DS3231<\/strong><\/p>\n
\"\"<\/a><\/p>\n
\"\"<\/a><\/p>\n
\u0412\u0440\u0435\u043c\u044f \u0432 \u0447\u0430\u0441\u0430\u0445 \u0443\u0441\u0442\u0430\u043d\u0430\u0432\u043b\u0438\u0432\u0430\u0435\u0442\u0441\u044f \u043f\u043e \u0432\u0440\u0435\u043c\u0435\u043d\u0438 \u043a\u043e\u043c\u043f\u0438\u043b\u044f\u0446\u0438\u0438, \u0434\u043b\u044f \u044d\u0442\u043e\u0433\u043e \u0440\u0430\u0441\u043a\u043e\u043c\u043c\u0435\u043d\u0442\u0438\u0440\u0443\u0439\u0442\u0435 \u0441\u0442\u0440\u043e\u043a\u0443:<\/p>\n
\/\/ set_time(24,3,8,15,9,55,0);\/\/ \u0433\u043e\u0434 00-99, \u0414\u041d 1-7 (1=\u0412\u0421), \u043c\u0435\u0441\u044f\u0446 1-12, \u0434\u0430\u0442\u0430 1-31, \u0447\u0430\u0441 0-23, \u043c\u0438\u043d\u0443\u0442\u044b 0-59, \u0441\u0435\u043a\u0443\u043d\u0434\u044b 0-59        <\/code><\/pre>\n
\u0423\u043a\u0430\u0436\u0438\u0442\u0435 \u0442\u0435\u043a\u0443\u0449\u0435\u0435 \u0432\u0440\u0435\u043c\u044f \u0438 \u0437\u0430\u0433\u0440\u0443\u0437\u0438\u0442\u0435 \u0441\u043a\u0435\u0442\u0447, \u0434\u0430\u043b\u0435\u0435 \u0437\u0430\u043a\u043e\u043c\u043c\u0435\u043d\u0442\u0438\u0440\u0443\u0439\u0442\u0435 \u044d\u0442\u0443 \u0441\u0442\u0440\u043e\u043a\u0443 \u0438 \u043f\u043e\u0432\u0442\u043e\u0440\u043d\u043e \u0437\u0430\u0433\u0440\u0443\u0437\u0438\u0442\u0435 \u0441\u043a\u0435\u0442\u0447.<\/p>\n
\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> \u00a0PB0<\/span>\r\n#define<\/span> CLK<\/span> \u00a0PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0\u00a0PB2<\/span> \u00a0\r\n\r\n#define<\/span> SDA<\/span> \u00a0PB3<\/span>\r\n#define<\/span> SCL<\/span> \u00a0PB4<\/span>\r\n \u00a0\u00a0\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> dp<\/span>;<\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 <\/span>\r\n \u00a0\/\/ set_time(24,3,8,15,9,55,0);\/\/ \u0433\u043e\u0434 00-99, \u0414\u041d 1-7 (1=\u0412\u0421), \u043c\u0435\u0441\u044f\u0446 1-12, \u0434\u0430\u0442\u0430 1-31, \u0447\u0430\u0441 0-23, \u043c\u0438\u043d\u0443\u0442\u044b 0-59, \u0441\u0435\u043a\u0443\u043d\u0434\u044b 0-59 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0byte<\/span> min<\/span> =<\/span> \u00a0(<\/span>ds_read<\/span>(<\/span>1<\/span>)<\/span> &<\/span> 0x0F<\/span>)<\/span> +<\/span> (<\/span>(<\/span>(<\/span>ds_read<\/span>(<\/span>1<\/span>)<\/span> &<\/span> 0x70<\/span>)<\/span> >><\/span> 4<\/span>)<\/span> *<\/span> 10<\/span>)<\/span>;<\/span>\r\n \u00a0byte<\/span> hour<\/span> =<\/span> (<\/span>(<\/span>ds_read<\/span>(<\/span>2<\/span>)<\/span> &<\/span> 0x0F<\/span>)<\/span> +<\/span> (<\/span>(<\/span>ds_read<\/span>(<\/span>2<\/span>)<\/span> &<\/span> 0x70<\/span>)<\/span> >><\/span> 4<\/span>)<\/span> *<\/span> 10<\/span>)<\/span>;<\/span>\r\n\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> hour<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n if<\/span>(<\/span>dp<\/span>==<\/span>0<\/span>)<\/span>{<\/span> WriteBit16<\/span>(<\/span>2<\/span>,<\/span> hour<\/span>%<\/span>10<\/span>+<\/span>0xf0<\/span>)<\/span>;<\/span>}<\/span>else<\/span>{<\/span>WriteBit16<\/span>(<\/span>2<\/span>,<\/span> hour<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> min<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> min<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>500<\/span>)<\/span>;<\/span>\r\n \u00a0dp<\/span>++<\/span>;<\/span>\r\n \u00a0if<\/span>(<\/span>dp<\/span>><\/span>1<\/span>)<\/span>{<\/span>dp<\/span>=<\/span>0<\/span>;<\/span>}<\/span>\r\n \u00a0}<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\nbool<\/span> i2c_read_bit<\/span>(<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0\u00a0bool<\/span> i2c_bit<\/span> =<\/span> 1<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> SDA<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> i2c_bit<\/span>=<\/span>0<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0return<\/span> i2c_bit<\/span>;<\/span> \u00a0\r\n}<\/span>\r\n \r\nbyte<\/span> i2c_write_byte<\/span>(<\/span>byte<\/span> data<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0for<\/span> (<\/span>byte<\/span> i<\/span>=<\/span>0<\/span>;<\/span> i<\/span><<\/span>8<\/span>;<\/span> i<\/span>++<\/span>)<\/span>{<\/span>i2c_write_bit<\/span>(<\/span>(<\/span>data<\/span>&<\/span>0x80<\/span>)<\/span>==<\/span>0<\/span>)<\/span>;<\/span>data<\/span><<=<\/span>1<\/span>;<\/span>}<\/span> \u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0return<\/span> i2c_read_bit<\/span>(<\/span>)<\/span>;<\/span> \r\n}<\/span>\r\n \r\nbyte<\/span> i2c_read_byte<\/span>(<\/span>byte<\/span> a<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0byte<\/span> i<\/span>,<\/span> data<\/span>=<\/span>0<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0for<\/span>(<\/span>i<\/span>=<\/span>0<\/span>;<\/span> i<\/span><<\/span>8<\/span>;<\/span> i<\/span>++<\/span>)<\/span>{<\/span>if<\/span> (<\/span>!<\/span>i2c_read_bit<\/span>(<\/span>)<\/span>)<\/span> data<\/span>++<\/span>;<\/span>if<\/span>(<\/span>i<\/span>!=<\/span>7<\/span>)<\/span> data<\/span><<=<\/span>1<\/span>;<\/span>}<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0i2c_write_bit<\/span>(<\/span>a<\/span>)<\/span>;<\/span>return<\/span> data<\/span>;<\/span> \u00a0\r\n}<\/span>\r\n \r\nvoid<\/span> i2c_write_bit<\/span>(<\/span>byte<\/span> b<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>5<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>b<\/span>)<\/span>{<\/span>DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span>}<\/span>else<\/span>{<\/span>DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>5<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span>\r\n}<\/span>\r\n \r\nvoid<\/span> i2c_start<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span>\r\n}<\/span>\r\n \r\nvoid<\/span> i2c_stop<\/span>(<\/span>)<\/span> \u00a0{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n}<\/span>\r\n \r\nbyte<\/span> ds_read<\/span>(<\/span>byte<\/span> reg<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0byte<\/span> data<\/span> =<\/span> 0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_start<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>0b11010000<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>reg<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_start<\/span>(<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>0b11010001<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0data<\/span> =<\/span> i2c_read_byte<\/span>(<\/span>0<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_stop<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0return<\/span> data<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n \r\nvoid<\/span> ds_write<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_start<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>0b11010000<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>reg<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>data<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_stop<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n \r\nvoid<\/span> set_time<\/span>(<\/span>byte<\/span> years<\/span>,<\/span> byte<\/span> days<\/span>,<\/span> byte<\/span> monts<\/span>,<\/span> byte<\/span> datas<\/span>,<\/span> byte<\/span> hours<\/span> ,<\/span>byte<\/span> minute<\/span>,<\/span> byte<\/span> second<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>second<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x00<\/span>,<\/span>(<\/span>second<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>second<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>minute<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x01<\/span>,<\/span>(<\/span>minute<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>minute<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span> \r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>hours<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x02<\/span>,<\/span>(<\/span>hours<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>hours<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>days<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x03<\/span>,<\/span>days<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>datas<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x04<\/span>,<\/span>(<\/span>datas<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>datas<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>monts<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x05<\/span>,<\/span>(<\/span>monts<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>monts<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>years<\/span> <<\/span> 255<\/span>)<\/span>ds_write<\/span>(<\/span>0x06<\/span>,<\/span>(<\/span>years<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>years<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\u00a0\r\n\r\n<\/pre>\n
<\/div>\n
\u041f\u0440\u043e\u0441\u0442\u044b\u0435 \u0447\u0430\u0441\u044b \u043d\u0430 DS3231 + \u0442\u0435\u0440\u043c\u043e\u043c\u0435\u0442\u0440<\/strong><\/p>\n
\u0427\u0430\u0441\u044b \u0440\u0435\u0430\u043b\u044c\u043d\u043e\u0433\u043e \u0432\u0440\u0435\u043c\u0435\u043d\u0438 \u0441\u043e\u0434\u0435\u0440\u0436\u0430\u0442 \u0434\u0430\u0442\u0447\u0438\u043a \u0442\u0435\u043c\u043f\u0435\u0440\u0430\u0442\u0443\u0440\u044b, \u043d\u0438\u0436\u0435 \u043f\u043e\u043a\u0430\u0437\u0430\u043d \u0441\u043a\u0435\u0442\u0447 \u043a\u043e\u0442\u043e\u0440\u044b\u0439 \u0432\u044b\u0432\u043e\u0434\u0438\u0442 \u043d\u0435 \u0442\u043e\u043b\u044c\u043a\u043e \u0442\u0435\u043a\u0443\u0449\u0435\u0435 \u0432\u0440\u0435\u043c\u044f, \u043d\u043e \u0438 \u0442\u0435\u043c\u043f\u0435\u0440\u0430\u0442\u0443\u0440\u0443.<\/p>\n
\"\"<\/a><\/p>\n
\"\"<\/a><\/p>\n
\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> \u00a0PB0<\/span>\r\n#define<\/span> CLK<\/span> \u00a0PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0\u00a0PB2<\/span> \u00a0\r\n\r\n#define<\/span> SDA<\/span> \u00a0PB3<\/span>\r\n#define<\/span> SCL<\/span> \u00a0PB4<\/span>\r\n \u00a0\u00a0\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> dp<\/span>;<\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 <\/span>\r\n \u00a0\/\/ set_time(24,3,8,15,9,55,0);\/\/ \u0433\u043e\u0434 00-99, \u0414\u041d 1-7 (1=\u0412\u0421), \u043c\u0435\u0441\u044f\u0446 1-12, \u0434\u0430\u0442\u0430 1-31, \u0447\u0430\u0441 0-23, \u043c\u0438\u043d\u0443\u0442\u044b 0-59, \u0441\u0435\u043a\u0443\u043d\u0434\u044b 0-59 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0byte<\/span> sec<\/span> =<\/span> \u00a0(<\/span>ds_read<\/span>(<\/span>0<\/span>)<\/span> &<\/span> 0x0F<\/span>)<\/span> +<\/span> (<\/span>(<\/span>(<\/span>ds_read<\/span>(<\/span>0<\/span>)<\/span> &<\/span> 0x70<\/span>)<\/span> >><\/span> 4<\/span>)<\/span> *<\/span> 10<\/span>)<\/span>;<\/span>\r\n \u00a0byte<\/span> min<\/span> =<\/span> \u00a0(<\/span>ds_read<\/span>(<\/span>1<\/span>)<\/span> &<\/span> 0x0F<\/span>)<\/span> +<\/span> (<\/span>(<\/span>(<\/span>ds_read<\/span>(<\/span>1<\/span>)<\/span> &<\/span> 0x70<\/span>)<\/span> >><\/span> 4<\/span>)<\/span> *<\/span> 10<\/span>)<\/span>;<\/span>\r\n \u00a0byte<\/span> hour<\/span> =<\/span> (<\/span>(<\/span>ds_read<\/span>(<\/span>2<\/span>)<\/span> &<\/span> 0x0F<\/span>)<\/span> +<\/span> (<\/span>(<\/span>ds_read<\/span>(<\/span>2<\/span>)<\/span> &<\/span> 0x70<\/span>)<\/span> >><\/span> 4<\/span>)<\/span> *<\/span> 10<\/span>)<\/span>;<\/span>\r\n \u00a0int<\/span> temper<\/span> =<\/span> (<\/span>ds_read<\/span>(<\/span>0x11<\/span>)<\/span>*<\/span>100<\/span> +<\/span> (<\/span>(<\/span>ds_read<\/span>(<\/span>0x12<\/span>)<\/span> &<\/span> 0b11000000<\/span>)<\/span> >><\/span> 6<\/span>)<\/span>*<\/span>25<\/span>)<\/span>\/<\/span>10<\/span> ;<\/span>\r\n\r\n if<\/span>(<\/span>sec<\/span><<\/span>50<\/span>)<\/span>{<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> hour<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0if<\/span>(<\/span>dp<\/span>==<\/span>0<\/span>)<\/span>{<\/span> WriteBit16<\/span>(<\/span>2<\/span>,<\/span> hour<\/span>%<\/span>10<\/span>+<\/span>0xf0<\/span>)<\/span>;<\/span>}<\/span>else<\/span>{<\/span>WriteBit16<\/span>(<\/span>2<\/span>,<\/span> hour<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> min<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> min<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n }<\/span>\r\n else<\/span>{<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 15<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> temper<\/span>\/<\/span>100<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> temper<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>+<\/span>0xf0<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> temper<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n \u00a0\r\n \u00a0_delay_ms<\/span>(<\/span>500<\/span>)<\/span>;<\/span>\r\n \u00a0dp<\/span>++<\/span>;<\/span>\r\n \u00a0if<\/span>(<\/span>dp<\/span>><\/span>1<\/span>)<\/span>{<\/span>dp<\/span>=<\/span>0<\/span>;<\/span>}<\/span>\r\n \u00a0}<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\nbool<\/span> i2c_read_bit<\/span>(<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0\u00a0bool<\/span> i2c_bit<\/span> =<\/span> 1<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> SDA<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> i2c_bit<\/span>=<\/span>0<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0return<\/span> i2c_bit<\/span>;<\/span> \u00a0\r\n}<\/span>\r\n \r\nbyte<\/span> i2c_write_byte<\/span>(<\/span>byte<\/span> data<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0for<\/span> (<\/span>byte<\/span> i<\/span>=<\/span>0<\/span>;<\/span> i<\/span><<\/span>8<\/span>;<\/span> i<\/span>++<\/span>)<\/span>{<\/span>i2c_write_bit<\/span>(<\/span>(<\/span>data<\/span>&<\/span>0x80<\/span>)<\/span>==<\/span>0<\/span>)<\/span>;<\/span>data<\/span><<=<\/span>1<\/span>;<\/span>}<\/span> \u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0return<\/span> i2c_read_bit<\/span>(<\/span>)<\/span>;<\/span> \r\n}<\/span>\r\n \r\nbyte<\/span> i2c_read_byte<\/span>(<\/span>byte<\/span> a<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0byte<\/span> i<\/span>,<\/span> data<\/span>=<\/span>0<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0for<\/span>(<\/span>i<\/span>=<\/span>0<\/span>;<\/span> i<\/span><<\/span>8<\/span>;<\/span> i<\/span>++<\/span>)<\/span>{<\/span>if<\/span> (<\/span>!<\/span>i2c_read_bit<\/span>(<\/span>)<\/span>)<\/span> data<\/span>++<\/span>;<\/span>if<\/span>(<\/span>i<\/span>!=<\/span>7<\/span>)<\/span> data<\/span><<=<\/span>1<\/span>;<\/span>}<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0i2c_write_bit<\/span>(<\/span>a<\/span>)<\/span>;<\/span>return<\/span> data<\/span>;<\/span> \u00a0\r\n}<\/span>\r\n \r\nvoid<\/span> i2c_write_bit<\/span>(<\/span>byte<\/span> b<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>5<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>b<\/span>)<\/span>{<\/span>DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span>}<\/span>else<\/span>{<\/span>DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>5<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span>\r\n}<\/span>\r\n \r\nvoid<\/span> i2c_start<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span>\r\n}<\/span>\r\n \r\nvoid<\/span> i2c_stop<\/span>(<\/span>)<\/span> \u00a0{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SCL<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>10<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> SDA<\/span>)<\/span>;<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n}<\/span>\r\n \r\nbyte<\/span> ds_read<\/span>(<\/span>byte<\/span> reg<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0byte<\/span> data<\/span> =<\/span> 0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_start<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>0b11010000<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>reg<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_start<\/span>(<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>0b11010001<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0data<\/span> =<\/span> i2c_read_byte<\/span>(<\/span>0<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_stop<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0return<\/span> data<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n \r\nvoid<\/span> ds_write<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_start<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>0b11010000<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>reg<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_write_byte<\/span>(<\/span>data<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0i2c_stop<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n \r\nvoid<\/span> set_time<\/span>(<\/span>byte<\/span> years<\/span>,<\/span> byte<\/span> days<\/span>,<\/span> byte<\/span> monts<\/span>,<\/span> byte<\/span> datas<\/span>,<\/span> byte<\/span> hours<\/span> ,<\/span>byte<\/span> minute<\/span>,<\/span> byte<\/span> second<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>second<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x00<\/span>,<\/span>(<\/span>second<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>second<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>minute<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x01<\/span>,<\/span>(<\/span>minute<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>minute<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span> \r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>hours<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x02<\/span>,<\/span>(<\/span>hours<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>hours<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>days<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x03<\/span>,<\/span>days<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>datas<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x04<\/span>,<\/span>(<\/span>datas<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>datas<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>monts<\/span> <<\/span> 255<\/span>)<\/span>{<\/span>ds_write<\/span>(<\/span>0x05<\/span>,<\/span>(<\/span>monts<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>monts<\/span>%<\/span>10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>years<\/span> <<\/span> 255<\/span>)<\/span>ds_write<\/span>(<\/span>0x06<\/span>,<\/span>(<\/span>years<\/span>\/<\/span>10<\/span><<<\/span>4<\/span>)<\/span>+<\/span>years<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\u00a0\r\n\r\n<\/pre>\n
ATtiny13+DHT11+DS18B20 — \u043c\u0438\u043d\u0438 \u043f\u043e\u0433\u043e\u0434\u043d\u0430\u044f \u0441\u0442\u0430\u043d\u0446\u0438\u044f<\/strong><\/p>\n
\u0412 \u044d\u0442\u043e\u043c \u043f\u0440\u0438\u043c\u0435\u0440\u0435 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u0435\u0442\u0441\u044f \u0434\u0432\u0430 \u0434\u0430\u0442\u0447\u0438\u043a\u0430, \u044d\u0442\u043e \u0434\u0430\u0442\u0447\u0438\u043a \u0442\u0435\u043c\u043f\u0435\u0440\u0430\u0442\u0443\u0440\u044b DS18B20, \u0434\u043b\u044f \u043f\u043e\u043b\u0443\u0447\u0435\u043d\u0438\u044f \u0434\u0430\u043d\u043d\u044b\u0445 \u043e \u0442\u0435\u043c\u043f\u0435\u0440\u0430\u0442\u0443\u0440\u0435 \u043d\u0430 \u0443\u043b\u0438\u0446\u0435 \u0438 \u0434\u0430\u0442\u0447\u0438\u043a\u00a0 DHT11 \u0434\u043b\u044f \u043f\u043e\u043b\u0443\u0447\u0435\u043d\u0438\u044f \u0434\u0430\u043d\u043d\u044b\u0445 \u043e \u0432\u043b\u0430\u0436\u043d\u043e\u0441\u0442\u0438 \u0438 \u0442\u0435\u043c\u043f\u0435\u0440\u0430\u0442\u0443\u0440\u044b \u0432 \u043f\u043e\u043c\u0435\u0449\u0435\u043d\u0438\u0438.<\/p>\n
\u0412\u044b\u0432\u043e\u0434 \u0438\u043d\u0444\u043e\u0440\u043c\u0430\u0446\u0438\u0438 \u043d\u0430 \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440 \u043f\u0440\u043e\u0438\u0441\u0445\u043e\u0434\u0438\u0442 \u043f\u043e\u043e\u0447\u0435\u0440\u0435\u0434\u043d\u043e \u0447\u0435\u0440\u0435\u0437 \u043a\u0430\u0436\u0434\u044b\u0435 3 \u0441\u0435\u043a\u0443\u043d\u0434\u044b.<\/p>\n\n\n\n
\"\"<\/a><\/td>\n\"\"<\/a><\/td>\n\"\"<\/a><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n
\"\"<\/a><\/p>\n
\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> \u00a0PB0<\/span>\r\n#define<\/span> CLK<\/span> \u00a0PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0\u00a0PB2<\/span> \u00a0\r\n#define<\/span> TEMP<\/span> PB4<\/span> \u00a0\u00a0\r\n#define<\/span> DHT<\/span> \u00a0PB3<\/span> \r\n\r\nbool<\/span> minus<\/span>;<\/span>\r\nbyte<\/span> data_dht<\/span>[<\/span>5<\/span>]<\/span>;<\/span>\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0int<\/span> temp<\/span> =<\/span> read_temp<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0if<\/span>(<\/span>temp<\/span><<\/span>0<\/span>)<\/span>{<\/span>minus<\/span>=<\/span>1<\/span>;<\/span>temp<\/span>=<\/span>-<\/span>temp<\/span>;<\/span>}<\/span>else<\/span>{<\/span>minus<\/span>=<\/span>0<\/span>;<\/span>}<\/span>\r\n \u00a0if<\/span>(<\/span>minus<\/span>==<\/span>0<\/span>)<\/span>{<\/span>WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 15<\/span>)<\/span>;<\/span>}<\/span>else<\/span>{<\/span>WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 10<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> temp<\/span>\/<\/span>100<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> temp<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>+<\/span>0xf0<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> temp<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>3000<\/span>)<\/span>;<\/span>\r\n \u00a0\r\n \u00a0\r\n \u00a0dht_read<\/span>(<\/span>)<\/span>;<\/span> \r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 15<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> 15<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> data_dht<\/span>[<\/span>2<\/span>]<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> data_dht<\/span>[<\/span>2<\/span>]<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>3000<\/span>)<\/span>;<\/span>\r\n\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> 12<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> 15<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> data_dht<\/span>[<\/span>0<\/span>]<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> data_dht<\/span>[<\/span>0<\/span>]<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>3000<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n\r\n \u00a0\u00a0\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\n\/\/\/\/ DS18B20 \/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/<\/span>\r\nuint8_t<\/span> therm_reset<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> i<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>480<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>60<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0i<\/span>=<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> TEMP<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>420<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> i<\/span>;<\/span>\r\n}<\/span>\r\nvoid<\/span> therm_write_bit<\/span>(<\/span>uint8_t<\/span> bit<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>bit<\/span>)<\/span> DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>60<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n}<\/span>\r\nuint8_t<\/span> therm_read_bit<\/span>(<\/span>void<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> bit<\/span>=<\/span>0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>14<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0if<\/span>(<\/span>PINB<\/span> &<\/span> (<\/span>1<\/span> <<<\/span> TEMP<\/span>)<\/span>)<\/span> bit<\/span>=<\/span>1<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>45<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> bit<\/span>;<\/span>\r\n}<\/span>\r\nuint8_t<\/span> therm_read_byte<\/span>(<\/span>void<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> i<\/span>=<\/span>8<\/span>,<\/span> n<\/span>=<\/span>0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>i<\/span>--<\/span>)<\/span>{<\/span>n<\/span>>>=<\/span>1<\/span>;<\/span>n<\/span>|=<\/span>(<\/span>therm_read_bit<\/span>(<\/span>)<\/span><<<\/span>7<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> n<\/span>;<\/span>\r\n}<\/span>\r\nvoid<\/span> therm_write_byte<\/span>(<\/span>uint8_t<\/span> byte<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> i<\/span>=<\/span>8<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>i<\/span>--<\/span>)<\/span>{<\/span>therm_write_bit<\/span>(<\/span>byte<\/span>&<\/span>1<\/span>)<\/span>;<\/span>byte<\/span> >>=<\/span> 1<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0}<\/span>}<\/span>\r\nint<\/span> read_temp<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0uint8_t<\/span> temperature<\/span>[<\/span>2<\/span>]<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0int<\/span> temper<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_reset<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0xCC<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0x44<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>!<\/span>therm_read_bit<\/span>(<\/span>)<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_reset<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0xCC<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_write_byte<\/span>(<\/span>0xBE<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0temperature<\/span>[<\/span>0<\/span>]<\/span>=<\/span>therm_read_byte<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0temperature<\/span>[<\/span>1<\/span>]<\/span>=<\/span>therm_read_byte<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0therm_reset<\/span>(<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0return<\/span> temper<\/span> =<\/span> (<\/span>temperature<\/span>[<\/span>1<\/span>]<\/span> <<<\/span> 8<\/span> |<\/span> temperature<\/span>[<\/span>0<\/span>]<\/span>)<\/span>*<\/span>10<\/span>\/<\/span>16<\/span>;<\/span>\r\n}<\/span> \u00a0\r\n\r\nint<\/span> dht_read<\/span>(<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0byte<\/span> i<\/span> =<\/span> 0<\/span>,<\/span>i1<\/span> =<\/span> 0<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>i<\/span> =<\/span> 0<\/span>;<\/span>i<\/span> <<\/span> 5<\/span>;<\/span>i<\/span>++<\/span>)<\/span>{<\/span>data_dht<\/span>[<\/span>i<\/span>]<\/span> =<\/span> 0<\/span>;<\/span>}<\/span> \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0_delay_ms<\/span>(<\/span>18<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span> (<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>40<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0DDRB<\/span> &=<\/span> ~<\/span>(<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>80<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>PINB<\/span> &<\/span> (<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0for<\/span> (<\/span>i<\/span> =<\/span> 0<\/span>;<\/span> i<\/span> <<\/span> 5<\/span>;<\/span> i<\/span>++<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0data_dht<\/span>[<\/span>i<\/span>]<\/span>=<\/span>0<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0for<\/span> (<\/span>i1<\/span>=<\/span>0<\/span>;<\/span> i1<\/span><<\/span>8<\/span>;<\/span> i1<\/span>++<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>!<\/span>(<\/span>PINB<\/span> &<\/span> (<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>)<\/span>)<\/span>;<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0_delay_us<\/span>(<\/span>30<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0if<\/span> (<\/span>PINB<\/span> &<\/span> (<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>)<\/span>{<\/span>data_dht<\/span>[<\/span>i<\/span>]<\/span> |=<\/span> 1<\/span> <<<\/span> (<\/span>7<\/span>-<\/span>i1<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0while<\/span>(<\/span>PINB<\/span> &<\/span> (<\/span>1<\/span> <<<\/span> DHT<\/span>)<\/span>)<\/span>;<\/span> \u00a0\r\n}<\/span>}<\/span>return<\/span> 1<\/span>;<\/span>}<\/span>\r\n\r\n<\/pre>\n
<\/div>\n
\u0421\u0435\u043a\u0443\u043d\u0434\u043e\u043c\u0435\u0440<\/strong><\/p>\n
\u0421\u0435\u043a\u0443\u043d\u0434\u043e\u043c\u0435\u0440 \u0438\u043c\u0435\u0435\u0442 \u0434\u0438\u0430\u043f\u0430\u0437\u043e\u043d \u0441\u0447\u0435\u0442\u0430 \u043e\u0442 0,0 \u0441\u0435\u043a \u0434\u043e 999,9 \u0441\u0435\u043a\u0443\u043d\u0434. \u041f\u0440\u0438 \u043d\u0430\u0436\u0430\u0442\u0438\u0438 \u043d\u0430 \u043a\u043d\u043e\u043f\u043a\u0443 \u043f\u0440\u043e\u0438\u0441\u0445\u043e\u0434\u0438\u0442 \u0437\u0430\u043f\u0443\u0441\u043a \u0441\u0435\u043a\u0443\u043d\u0434\u043e\u043c\u0435\u0440\u0430, \u043f\u0440\u0438 \u043f\u043e\u0432\u0442\u043e\u0440\u043d\u043e\u043c \u043d\u0430\u0436\u0430\u0442\u0438\u0438 \u043e\u0441\u0442\u0430\u043d\u043e\u0432\u043a\u0430 \u0441\u0447\u0435\u0442\u0430, \u0435\u0441\u043b\u0438 \u043d\u0430\u0436\u0430\u0442\u044c \u043a\u043d\u043e\u043f\u043a\u0443 \u0435\u0449\u0435 \u0440\u0430\u0437, \u0442\u043e \u043f\u0440\u043e\u0438\u0437\u043e\u0439\u0434\u0435\u0442 \u0441\u0431\u0440\u043e\u0441 \u043f\u043e\u043a\u0430\u0437\u0430\u043d\u0438\u0439 \u0441\u0435\u043a\u0443\u043d\u0434\u043e\u043c\u0435\u0440\u0430.<\/p>\n
\"\"<\/a><\/p>\n
\"\"<\/a><\/p>\n
\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> \u00a0\u00a0\u00a0PB0<\/span>\r\n#define<\/span> CLK<\/span> \u00a0\u00a0\u00a0PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0\u00a0\u00a0\u00a0PB2<\/span> \r\n\r\n#define<\/span> BUTTON<\/span> PB4<\/span> \r\n\r\nint<\/span> ccc<\/span>;<\/span>\r\nbool<\/span> start<\/span>;<\/span>\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>BUTTON<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0if<\/span>(<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> BUTTON<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>==<\/span>LOW<\/span> &&<\/span> start<\/span>==<\/span>0<\/span> &&<\/span> ccc<\/span>==<\/span>0<\/span>)<\/span>{<\/span>start<\/span>=<\/span>1<\/span>;<\/span>_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>ccc<\/span>=<\/span>2<\/span>;<\/span>}<\/span>\r\n \u00a0if<\/span>(<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> BUTTON<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>==<\/span>LOW<\/span> &&<\/span> start<\/span>==<\/span>1<\/span>)<\/span>{<\/span>start<\/span>=<\/span>0<\/span>;<\/span>_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0if<\/span>(<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> BUTTON<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>==<\/span>LOW<\/span> &&<\/span> start<\/span>==<\/span>0<\/span> &&<\/span> ccc<\/span>><\/span>0<\/span>)<\/span>{<\/span>ccc<\/span>=<\/span>0<\/span>;<\/span>_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0if<\/span>(<\/span>start<\/span>==<\/span>1<\/span>)<\/span>{<\/span>ccc<\/span>++<\/span>;<\/span>}<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> ccc<\/span>\/<\/span>1000<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> ccc<\/span>\/<\/span>100<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> ccc<\/span>\/<\/span>10<\/span>%<\/span>10<\/span> +<\/span> 0xF0<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> ccc<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>100<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\n<\/pre>\n
\"\"<\/a>\u0422\u0430\u0439\u043c\u0435\u0440 \u0441 \u0437\u0432\u0443\u043a\u043e\u0432\u044b\u043c \u043e\u043f\u043e\u0432\u0435\u0449\u0435\u043d\u0438\u0435\u043c \u0441 \u0444\u0438\u043a\u0441\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u044b\u043c\u0438 \u043e\u0442\u043c\u0435\u0442\u043a\u0430\u043c\u0438 \u0432\u0440\u0435\u043c\u0435\u043d\u0438<\/strong><\/p>\n
\u0422\u0430\u0439\u043c\u0435\u0440 \u0438\u043c\u0435\u0435\u0442 \u043d\u0435\u0441\u043a\u043e\u043b\u044c\u043a\u043e \u0444\u0438\u043a\u0441\u0438\u0440\u043e\u0432\u0430\u043d\u043d\u044b\u0445 \u043e\u0442\u043c\u0435\u0442\u043e\u043a \u0432\u0440\u0435\u043c\u0435\u043d\u0438 1, 2, 5, 7, 10, 15 , 20, 30, 45, 60 \u0438 90 \u043c\u0438\u043d\u0443\u0442. \u041d\u043e \u0412\u044b \u043c\u043e\u0436\u0435\u0442\u0435 \u0438\u0437\u043c\u0435\u043d\u0438\u0442\u044c \u0438\u0445 \u0438\u043b\u0438 \u0434\u043e\u0431\u0430\u0432\u0438\u0442\u044c \u043d\u043e\u0432\u044b\u0435. \u0422\u0430\u0439\u043c\u0435\u0440 \u0438\u043c\u0435\u0435\u0442 \u0434\u0432\u0435 \u043a\u043d\u043e\u043f\u043a\u0438, \u043e\u0434\u043d\u0430 \u0434\u043b\u044f \u0432\u044b\u0431\u043e\u0440\u0430 \u043e\u0442\u043c\u0435\u0442\u043a\u0438 \u0432\u0440\u0435\u043c\u0435\u043d\u0438, \u0434\u0440\u0443\u0433\u0430\u044f \u0434\u043b\u044f \u0437\u0430\u043f\u0443\u0441\u043a\u0430 \u0442\u0430\u0439\u043c\u0435\u0440\u0430. \u0412 \u0442\u0430\u0439\u043c\u0435\u0440\u0435 \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u0443\u0435\u0442\u0441\u044f \u0430\u043a\u0442\u0438\u0432\u043d\u044b\u0439 \u0437\u0443\u043c\u043c\u0435\u0440 (\u043f\u0440\u0438 \u043f\u043e\u0434\u0430\u0447\u0435 GND \u043d\u0430 \u0443\u043f\u0440\u0430\u0432\u043b\u044f\u044e\u0449\u0438\u0439 \u0432\u0445\u043e\u0434 \u0437\u0432\u0443\u0447\u0438\u0442 \u0437\u0432\u0443\u043a\u043e\u0432\u043e\u0439 \u0441\u0438\u0433\u043d\u0430\u043b), \u043a\u043e\u0442\u043e\u0440\u044b\u0439 \u0438\u0437\u0434\u0430\u0435\u0442 \u0437\u0432\u0443\u043a\u043e\u0432\u043e\u0439 \u0441\u0438\u0433\u043d\u0430\u043b \u043f\u0440\u0438 \u0437\u0430\u0432\u0435\u0440\u0448\u0435\u043d\u0438\u0438 \u043e\u0442\u0441\u0447\u0435\u0442\u0430 \u0442\u0430\u0439\u043c\u0435\u0440\u0430.<\/p>\n
\"\"<\/a><\/p>\n
\"\"<\/a><\/p>\n
\"\"<\/a><\/p>\n
\/\/ MAX7219<\/span>\r\n#define<\/span> DIN<\/span> \u00a0\u00a0\u00a0PB0<\/span>\r\n#define<\/span> CLK<\/span> \u00a0\u00a0\u00a0PB1<\/span>\r\n#define<\/span> CS<\/span> \u00a0\u00a0\u00a0\u00a0PB2<\/span> \r\n\r\n#define<\/span> BUTTON_1<\/span> PB4<\/span> \u00a0\/\/ start\/stop <\/span>\r\n#define<\/span> BUTTON_2<\/span> PB3<\/span> \u00a0\/\/ set time<\/span>\r\n\r\nint<\/span> ccc<\/span>,<\/span>set<\/span>,<\/span>min<\/span>,<\/span>sec<\/span>;<\/span>\r\nbool<\/span> start<\/span>;<\/span>\r\n\r\n#include<\/span> <<\/span>avr<\/span>\/<\/span>io<\/span>.<\/span>h<\/span>><\/span>\r\n#include<\/span> <<\/span>util<\/span>\/<\/span>delay<\/span>.<\/span>h<\/span>><\/span>\r\n\r\nint<\/span> main<\/span>(<\/span>void<\/span>)<\/span> {<\/span>\r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>BUTTON_1<\/span>)<\/span>|<\/span>(<\/span>2<\/span><<<\/span>BUTTON_2<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span> \r\n \u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>|<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0F<\/span>,<\/span> 0<\/span>)<\/span>;<\/span>\/\/ \u0442\u0435\u0441\u0442 \u0432\u044b\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0C<\/span>,<\/span> 1<\/span>)<\/span>;<\/span>\/\/ \u0432\u043a\u043b. \u0438\u043d\u0434\u0438\u043a.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0A<\/span>,<\/span> 2<\/span>)<\/span>;<\/span>\/\/ \u044f\u0440\u043a\u043e\u0441\u0442\u044c<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x09<\/span>,<\/span> 0xFF<\/span>)<\/span>;<\/span>\/\/ \u0434\u0435\u0448\u0438\u0444\u0440\u0430\u0442\u043e\u0440\u044b \u0432\u043a\u043b.<\/span>\r\n \u00a0\u00a0WriteBit16<\/span>(<\/span>0x0B<\/span>,<\/span> 3<\/span>)<\/span>;<\/span>\/\/ \u043a\u043e\u043b-\u0432\u043e \u0440\u0430\u0437\u0440\u044f\u0434\u043e\u0432 \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0<\/span>\r\n \r\nwhile<\/span>(<\/span>1<\/span>)<\/span> {<\/span> \r\n \u00a0if<\/span>(<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> BUTTON_2<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>==<\/span>LOW<\/span>)<\/span>{<\/span>start<\/span>=<\/span>0<\/span>;<\/span>_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>set<\/span>++<\/span>;<\/span>if<\/span>(<\/span>set<\/span>><\/span>11<\/span>)<\/span>{<\/span>set<\/span>=<\/span>0<\/span>;<\/span>}<\/span>}<\/span>\r\n\r\nif<\/span>(<\/span>start<\/span>==<\/span>0<\/span>)<\/span>{<\/span>\r\n \u00a0switch<\/span>(<\/span>set<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 0<\/span>:<\/span> ccc<\/span>=<\/span>300<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 1<\/span>:<\/span> ccc<\/span>=<\/span>900<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 2<\/span>:<\/span> ccc<\/span>=<\/span>1500<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 3<\/span>:<\/span> ccc<\/span>=<\/span>2100<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 4<\/span>:<\/span> ccc<\/span>=<\/span>3000<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 5<\/span>:<\/span> ccc<\/span>=<\/span>3600<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 6<\/span>:<\/span> ccc<\/span>=<\/span>4500<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 7<\/span>:<\/span> ccc<\/span>=<\/span>6000<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 8<\/span>:<\/span> ccc<\/span>=<\/span>9000<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 9<\/span>:<\/span> ccc<\/span>=<\/span>13500<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 10<\/span>:<\/span> ccc<\/span>=<\/span>18000<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0case<\/span> 11<\/span>:<\/span> ccc<\/span>=<\/span>27000<\/span>;<\/span>break<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0}<\/span>}<\/span>\r\n \u00a0\r\n \u00a0if<\/span>(<\/span>(<\/span>(<\/span>PINB<\/span> >><\/span> BUTTON_1<\/span>)<\/span> &<\/span> 1<\/span>)<\/span>==<\/span>LOW<\/span> &&<\/span> start<\/span>==<\/span>0<\/span>)<\/span>{<\/span>start<\/span>=<\/span>1<\/span>;<\/span>_delay_ms<\/span>(<\/span>100<\/span>)<\/span>;<\/span>}<\/span>\r\n\r\n \u00a0if<\/span>(<\/span>start<\/span>==<\/span>1<\/span>)<\/span>{<\/span>ccc<\/span>--<\/span>;<\/span>if<\/span>(<\/span>ccc<\/span><<\/span>0<\/span>)<\/span>{<\/span>start<\/span>=<\/span>0<\/span>;<\/span>\r\n \u00a0DDRB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>BUTTON_1<\/span>)<\/span>;<\/span>\r\n \u00a0for<\/span>(<\/span>int<\/span> n<\/span>=<\/span>0<\/span>;<\/span>n<\/span><<\/span>10<\/span>;<\/span>n<\/span>++<\/span>)<\/span>{<\/span>PORTB<\/span>|=<\/span>(<\/span>1<\/span><<<\/span>BUTTON_1<\/span>)<\/span>;<\/span>_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>PORTB<\/span>&=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>BUTTON_1<\/span>)<\/span>;<\/span>_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0DDRB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>BUTTON_1<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>}<\/span>\r\n\r\n \u00a0min<\/span> =<\/span> ccc<\/span>\/<\/span>300<\/span>;<\/span>\r\n \u00a0sec<\/span> =<\/span> (<\/span>ccc<\/span>*<\/span>2<\/span>-<\/span>(<\/span>min<\/span>*<\/span>600<\/span>)<\/span>)<\/span>\/<\/span>10<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>1<\/span>,<\/span> min<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>2<\/span>,<\/span> min<\/span>%<\/span>10<\/span> +<\/span> 0xF0<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>3<\/span>,<\/span> sec<\/span>\/<\/span>10<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0WriteBit16<\/span>(<\/span>4<\/span>,<\/span> sec<\/span>%<\/span>10<\/span>)<\/span>;<\/span>\r\n \u00a0_delay_ms<\/span>(<\/span>200<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span>\r\n}<\/span>\r\n\r\nvoid<\/span> WriteBit16<\/span>(<\/span>byte<\/span> reg<\/span>,<\/span> byte<\/span> data<\/span>)<\/span>{<\/span> \u00a0\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>reg<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0for<\/span>(<\/span>int<\/span> i<\/span> =<\/span> 7<\/span>;<\/span> i<\/span> >=<\/span> 0<\/span>;<\/span> i<\/span>--<\/span>)<\/span>{<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0if<\/span>(<\/span>(<\/span>(<\/span>data<\/span> >><\/span> i<\/span>)<\/span> &<\/span> 1<\/span>)<\/span> ==<\/span> 1<\/span>)<\/span>{<\/span>PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0else<\/span>{<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>\r\n \u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0}<\/span>\r\n \u00a0\u00a0\u00a0\u00a0PORTB<\/span> |=<\/span>(<\/span>1<\/span><<<\/span>CS<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>CLK<\/span>)<\/span>;<\/span>PORTB<\/span> &=<\/span>~<\/span>(<\/span>1<\/span><<<\/span>DIN<\/span>)<\/span>;<\/span>\r\n \u00a0}<\/span> \u00a0\r\n\r\n<\/pre>\n
\u0424\u043e\u0440\u0443\u043c — http:\/\/forum.rcl-radio.ru\/viewtopic.php?id=663<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"
\u041c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440 ATtiny13 \u043e\u0442\u043b\u0438\u0447\u043d\u043e \u043f\u043e\u0434\u0445\u043e\u0434\u0438\u0442 \u0434\u043b\u044f \u043c\u0430\u043b\u0435\u043d\u044c\u043a\u0438\u0445 \u0438 \u0434\u0435\u0448\u0435\u0432\u044b\u0445 \u043f\u0440\u043e\u0435\u043a\u0442\u043e\u0432, \u0430 \u043f\u043e\u0434\u0434\u0435\u0440\u0436\u043a\u0430 \u0441\u0440\u0435\u0434\u043e\u0439 \u043f\u0440\u043e\u0433\u0440\u0430\u043c\u043c\u0438\u0440\u043e\u0432\u0430\u043d\u0438\u044f Arduino IDE \u0437\u0430\u043c\u0435\u0442\u043d\u043e \u0443\u043f\u0440\u043e\u0449\u0430\u0435\u0442 \u0440\u0430\u0431\u043e\u0442\u0443 \u0441 \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u043e\u043c. \u041a\u0430\u043a \u0438\u0441\u043f\u043e\u043b\u044c\u0437\u043e\u0432\u0430\u0442\u044c ATtiny13 \u0432 \u0441\u0440\u0435\u0434\u0435 Arduino \u043f\u043e\u0434\u0440\u043e\u0431\u043d\u043e \u043e\u043f\u0438\u0441\u0430\u043d\u043e \u0432 http:\/\/rcl-radio.ru\/?p=98729. \u0412 \u044d\u0442\u043e\u0439 \u0441\u0442\u0430\u0442\u044c\u0435 \u043f\u043e\u043a\u0430\u0437\u0430\u043d\u044b \u043d\u0435\u0441\u043a\u043e\u043b\u044c\u043a\u043e \u043f\u0440\u043e\u0441\u0442\u044b\u0445 \u043f\u0440\u0438\u043c\u0435\u0440\u043e\u0432 \u0440\u0430\u0431\u043e\u0442\u044b \u043c\u0438\u043a\u0440\u043e\u043a\u043e\u043d\u0442\u0440\u043e\u043b\u043b\u0435\u0440\u0430 ATtiny13 \u0441\u043e\u0432\u043c\u0435\u0441\u0442\u043d\u043e \u0441 4-\u0445 \u0440\u0430\u0437\u0440\u044f\u0434\u043d\u044b\u043c 7-\u0441\u0435\u0433\u043c\u0435\u043d\u0442\u043d\u044b\u043c \u0438\u043d\u0434\u0438\u043a\u0430\u0442\u043e\u0440\u043e\u043c (BTE21—30) \u043d\u0430 MAX7219 0,56′. MAX7219 \u2013 \u0434\u0440\u0430\u0439\u0432\u0435\u0440 \u0432\u043e\u0441\u044c\u043c\u0438 \u0440\u0430\u0437\u0440\u044f\u0434\u043d\u043e\u0433\u043e […]<\/p>\n","protected":false},"author":1,"featured_media":132446,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[239,24,21],"tags":[],"class_list":["post-132443","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-arduino","category-24","category-21"],"views":3605,"_links":{"self":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts\/132443","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=132443"}],"version-history":[{"count":7,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts\/132443\/revisions"}],"predecessor-version":[{"id":133873,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/posts\/132443\/revisions\/133873"}],"wp:featuredmedia":[{"embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=\/wp\/v2\/media\/132446"}],"wp:attachment":[{"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=132443"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=132443"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/rcl-radio.ru\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=132443"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}